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SPARTAN: a spectral and entropy-based partial-scan and test point insertion algorithm

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TitleInfo (displayLabel = Citation Title); (type = uniform)
Title
SPARTAN: a spectral and entropy-based partial-scan and test point insertion algorithm
TitleInfo (displayLabel = Other Title); (type = alternative)
Title
Spectral and entropy-based partial-scan and test point insertion algorithm
Name (ID = NAME001); (type = personal)
NamePart (type = family)
Khan
NamePart (type = given)
Omar I.
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Omar I. Khan
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author
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Bushnell
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Michael
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Advisory Committee
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Michael Lee Bushnell
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chair
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Parashar
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Manish
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Advisory Committee
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Manish Parashar
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internal member
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Marsic
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Ivan
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Advisory Committee
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Ivan Marsic
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internal member
Name (ID = NAME005); (type = personal)
NamePart (type = family)
Agrawal
NamePart (type = given)
Vishwani
Affiliation
Advisory Committee
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Vishwani D Agrawal
Role
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outside member
Name (ID = NAME006); (type = personal)
NamePart (type = family)
Chakraborty
NamePart (type = given)
Tapan
Affiliation
Advisory Committee
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Tapan J Chakraborty
Role
RoleTerm (authority = RULIB)
outside member
Name (ID = NAME007); (type = corporate)
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Rutgers University
Role
RoleTerm (authority = RULIB)
degree grantor
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Graduate School - New Brunswick
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school
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Text
Genre (authority = marcgt)
theses
OriginInfo
DateCreated (qualifier = exact)
2007
DateOther (qualifier = exact); (type = degree)
2007
Language
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English
PhysicalDescription
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electronic
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application/pdf
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text/xml
Extent
xii, 116 pages
Abstract
We propose a new partial-scan algorithm and two new test point insertion (TPI) algorithms, TPI1 and TPI2, to improve the testability, reduce the test volume, and reduce the test application time of the circuit-under-test (CUT). The partial-scan algorithm and the test point insertion algorithms use toggling rates of the flip-flops and the candidate test point lines, analyzed using digital signal processing (DSP) methods, and Shannon entropy measures of flip-flops and candidate test point lines to select scan flip-flops and test points. We also discovered a new and the most potent combination of design-for-testability (DFT) and sequential automatic test-pattern generation (ATPG) algorithms.
Testing of complex circuits is time consuming and extremely difficult. Most circuit designs employ full-scan to alleviate the testability problems. Full-scan has two advantages. It uses a combinational ATPG for test generation and full-scan can be used to scan out the states of the CUT for post-silicon debug. But, full-scan requires long scan-in and scan-out sequences, thus resulting in longer testing times, leading to increased test power and test cost. Another
disadvantage of using full-scan is increased delay on the critical paths of the CUT usually by 5 to 10%. The flip-flops on the critical path will have extra hardware.
Partial-scan with test points can help reduce test volume and test application time and achieve very high fault coverages (FCs). This reduces the test time and lowers the test power because the partial-scan chain requires shorter scan-in and scan-out sequences. Also, by avoiding scanning of flip-flops and addition of test points on critical paths, the CUT can operate without any extra delay.
The average test volume of SPARTAN partial-scan with TPI1 (excluding s38417) is 17.23% shorter than full-scan with TRAN and the average test volume of SPARTAN partial-scan with TPI2 (excluding s38417) is 7.55% shorter than full-scan with TRAN. SPARTAN's average test application time (excluding s38417) with partial-scan only is 44.30% longer than full-scan with TRAN. The average test application time of SPARTAN partial-scan with TPI1 (excluding
s38417) is 18.05% shorter than full-scan with TRAN and the average test application time of SPARTAN partial-scan with TPI2 (excluding s38417) is 8.71% shorter than full-scan with TRAN.
Note (type = degree)
Ph.D.
Note (type = bibliography)
Includes bibliographical references (p. 109-114).
Subject (ID = SUBJ1); (authority = RUETD)
Topic
Electrical and Computer Engineering
Subject (ID = SUBJ2); (authority = ETD-LCSH)
Topic
Integrated circuits
Subject (ID = SUBJ3); (authority = ETD-LCSH)
Topic
Computer algorithms
RelatedItem (type = host)
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Title
Graduate School - New Brunswick Electronic Theses and Dissertations
Identifier (type = local)
rucore19991600001
Identifier (type = hdl)
http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.16615
Identifier
ETD_545
Location
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NjNbRU
Identifier (type = doi)
doi:10.7282/T3RX9CGG
Genre (authority = ExL-Esploro)
ETD doctoral
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The author owns the copyright to this work.
Copyright
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Name
Omar Khan
Role
Copyright holder
Affiliation
Rutgers University. Graduate School - New Brunswick
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Non-exclusive ETD license
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Author Agreement License
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I hereby grant to the Rutgers University Libraries and to my school the non-exclusive right to archive, reproduce and distribute my thesis or dissertation, in whole or in part, and/or my abstract, in whole or in part, in and from an electronic format, subject to the release date subsequently stipulated in this submittal form and approved by my school. I represent and stipulate that the thesis or dissertation and its abstract are my original work, that they do not infringe or violate any rights of others, and that I make these grants as the sole owner of the rights to my thesis or dissertation and its abstract. I represent that I have obtained written permissions, when necessary, from the owner(s) of each third party copyrighted matter to be included in my thesis or dissertation and will supply copies of such upon request by my school. I acknowledge that RU ETD and my school will not distribute my thesis or dissertation or its abstract if, in their reasonable judgment, they believe all such rights have not been secured. I acknowledge that I retain ownership rights to the copyright of my work. I also retain the right to use all or part of this thesis or dissertation in future works, such as articles or books.
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