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An efficient architecture for detection of multiple bit upsets in processor register files

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TypeOfResource
Text
TitleInfo (ID = T-1)
Title
An efficient architecture for detection of multiple bit upsets in processor register files
Identifier
ETD_1680
Identifier (type = hdl)
http://hdl.rutgers.edu/1782.2/rucore10001600001.ETD.000051428
Language
LanguageTerm (authority = ISO639-2); (type = code)
eng
Genre (authority = marcgt)
theses
Subject (ID = SBJ-1); (authority = RUETD)
Topic
Electrical and Computer Engineering
Subject (ID = SBJ-1); (authority = ETD-LCSH)
Topic
Fault-tolerant computing
Abstract
With the semiconductor industry transitioning into the next generation of deep submicron technology such as 40 nm or 32 nm CMOS technology, transistors are becoming more vulnerable to malfunction due to soft errors. Due to the reduction in the supply and threshold voltages of the transistors in this smaller geometry, soft errors can affect the state of multiple numbers of transistors simultaneously. Hence, the traditional fault model of a single event upset (SEU) due to a soft error needs to be revisited and a new fault model and an associated fault tolerant architecture for circuit structures in deep submicron technology based on multiple-bit upsets (MBUs) needs to be developed. In this reseach work, we propose a novel fault tolerant architecture for the register files in a processor that can detect the MBUs in them efficiently. In this proposed method, we compute and store the Cyclic Redundancy Check (CRC) bits of a complete register which can be 32 bits or 64 bits wide, when new data is loaded into it. The CRC bits are of smaller bit size and are stored in a soft error protected memory structure using well known conventional soft error protection mechanisms such as error-correcting codes (ECCs), etc., for memory structures. When data from a register is read, first the new CRC value is computed based on the existing data value stored in that register and compared against the original CRC value stored previously in the soft error tolerant memory structure. If there is a difference in these two CRC values an error is flagged as it shows that the data is corrupted due to a soft error either by an SEU or MBUs during the time interval between the last write and the current read operation for that register. This operation is done for reading every register in the register file. Although this method introduces timing and area overheads, they are tolerable and this method of detection scales with the increase in the number registers in the register file. Finally, we present simulation results regarding the fault detection capability of this proposed method.
PhysicalDescription
Form (authority = gmd)
electronic resource
Extent
ix, 62 p. : ill.
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application/pdf
InternetMediaType
text/xml
Note (type = degree)
M.S.
Note (type = bibliography)
Includes bibliographical references (p. 60-62)
Note (type = statement of responsibility)
by Wen Yueh
Name (ID = NAME-1); (type = personal)
NamePart (type = family)
Yueh
NamePart (type = given)
Wen
NamePart (type = date)
1985
Role
RoleTerm (authority = RULIB); (type = )
author
DisplayForm
Wen Yueh
Name (ID = NAME-2); (type = personal)
NamePart (type = family)
Chakraborty
NamePart (type = given)
Tapan
Role
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chair
Affiliation
Advisory Committee
DisplayForm
Tapan Chakraborty
Name (ID = NAME-3); (type = personal)
NamePart (type = family)
Bushnell
NamePart (type = given)
Michael
Role
RoleTerm (authority = RULIB); (type = )
co-chair
Affiliation
Advisory Committee
DisplayForm
Michael L. Bushnell
Name (ID = NAME-4); (type = personal)
NamePart (type = family)
Parashar
NamePart (type = given)
Manish
Role
RoleTerm (authority = RULIB); (type = )
internal member
Affiliation
Advisory Committee
DisplayForm
Manish Parashar
Name (ID = NAME-1); (type = corporate)
NamePart
Rutgers University
Role
RoleTerm (authority = RULIB); (type = )
degree grantor
Name (ID = NAME-2); (type = corporate)
NamePart
Graduate School - New Brunswick
Role
RoleTerm (authority = RULIB); (type = )
school
OriginInfo
DateCreated (point = ); (qualifier = exact)
2009
DateOther (qualifier = exact); (type = degree)
2009-05
Place
PlaceTerm (type = code)
xx
RelatedItem (type = host)
TitleInfo
Title
Rutgers University Electronic Theses and Dissertations
Identifier (type = RULIB)
ETD
RelatedItem (type = host)
TitleInfo
Title
Graduate School - New Brunswick Electronic Theses and Dissertations
Identifier (type = local)
rucore19991600001
Location
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NjNbRU
Identifier (type = doi)
doi:10.7282/T3DB8221
Genre (authority = ExL-Esploro)
ETD graduate
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The author owns the copyright to this work.
Copyright
Status
Copyright protected
Availability
Status
Open
RightsEvent (AUTHORITY = rulib); (ID = 1)
Type
Permission or license
Detail
Non-exclusive ETD license
AssociatedObject (AUTHORITY = rulib); (ID = 1)
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License
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Author Agreement License
Detail
I hereby grant to the Rutgers University Libraries and to my school the non-exclusive right to archive, reproduce and distribute my thesis or dissertation, in whole or in part, and/or my abstract, in whole or in part, in and from an electronic format, subject to the release date subsequently stipulated in this submittal form and approved by my school. I represent and stipulate that the thesis or dissertation and its abstract are my original work, that they do not infringe or violate any rights of others, and that I make these grants as the sole owner of the rights to my thesis or dissertation and its abstract. I represent that I have obtained written permissions, when necessary, from the owner(s) of each third party copyrighted matter to be included in my thesis or dissertation and will supply copies of such upon request by my school. I acknowledge that RU ETD and my school will not distribute my thesis or dissertation or its abstract if, in their reasonable judgment, they believe all such rights have not been secured. I acknowledge that I retain ownership rights to the copyright of my work. I also retain the right to use all or part of this thesis or dissertation in future works, such as articles or books.
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application/x-tar
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