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Physical layer design and analysis of WINLAB network centric cognitive radio
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Hari, Tejaswy. Physical layer design and analysis of WINLAB network centric cognitive radio. Retrieved from https://doi.org/doi:10.7282/T3H995C8

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TitlePhysical layer design and analysis of WINLAB network centric cognitive radio
NameHari, Tejaswy (author); Mandayam, Narayan (chair); Spasojevic, Predrag (internal member); Zhang, Yangyong (internal member); Miljanic, Zoran (outside member); Rutgers University; Graduate School - New Brunswick
Date Created
Other Date2009-10 (degree)
SubjectElectrical and Computer Engineering, Cognitive radio networks
Extentxii, 97 p. : ill.
DescriptionThe wireless domain is ever expanding with new technologies and protocols emerging for all possible environments. Each new protocol is an improvement over the other. High performance FPGAs have entered the market with advanced signal processing capabilities which have vast resources and area to accommodate complex designs. The amalgamation of the two has given rise to programmable radios better known as cognitive radios. This thesis proposes the physical layer design and analysis of the WiNC2R- WINLAB Network Centric Cognitive Radio which is a SoC (System on Chip) based hardware platform on FPGA. This system is based on the Virtual Flow Paradigm. The key characteristic of this concept is that the protocol processing and selecting specific hardware accelerators is engaged dynamically by the software.
The WiNC2R consists of three main parts – the data layer, the interconnect layer and the control layer. All the data processing and functioning is handled by the data layer which is the focus of this thesis.
We have designed an adaptive modulator and demodulator for WiNC2R. These blocks exploit the advantages of software flexibility and hardware high speeds. It’s an inter-protocol operable processing engine that caters to all modulation schemes and can vary them on the fly. These engines show MIMO capabilities also due to their data flow independent design. The software interface to the register maps instantiated inside the processing engines which is used to configure the system before start of the frame.
We successfully sent OFDM frames implemented on Virtual Flow Paradigm across and performed timing and utilization analysis. The modulator and demodulator parameters can be conveniently setup in the software. The flexible hardware design enables fast switching between WiFi and WiMAX frames. The thesis starts with the design of top level architecture and further dig deeper the design of the Modulator and Demodulator processing engines. We then conclude with the timing and area resource analysis and discuss an improvement in design.
NoteM.S.
NoteIncludes bibliographical references (p. 93)
Noteby Tejaswy Hari
Genretheses, ETD graduate
Persistent URLhttps://doi.org/doi:10.7282/T3H995C8
Languageeng
CollectionGraduate School - New Brunswick Electronic Theses and Dissertations
Organization NameRutgers, The State University of New Jersey
RightsThe author owns the copyright to this work
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